Aim of the Program

Chip Design in India has grown by leaps and bounds, thanks to the presence of several multinationals, design services companies and product companies. It translates to a plethora of opportunities for quality VLSItrained talent. This FDP is intended for young faculty members working in engineering colleges and research scholars to make them familiar with latest trends in VLSI Design/Technology and to enrich them with depth and breadth of knowledge. In VLSI design, the methodology makes extensive use of CAD techniques for all the tasks that span design through layout to finally “sign-off the design database” for chip fabrication. In addition to theoretical knowledge, the aim of this FDP is to equip the participants with hands-on experience in the state-of-art Cadence EDA tools for VLSI Design supporting Analog and Digital Front End and Back End.

Joint Chapter of CAS/EDS Societies, IEEE Hyderabad Section

IEEE Hyderabad Section was established in 1980 and has been a very active section in Asia Pacific region. It was awarded the large section award in year 2015. There are 10 Technical Societies, 2 affinity groups and one Technology management council in the Hyderabad section. The Joint Chapter of IEEE Circuits and Systems/ Electron Device Societies was established in 2011 by a team of dedicated volunteers from Industry and Academia. IEEE CAS/EDS Hyderabad has successfully hosted PrimeAsia 2012, PrimeAsia 2013 and PrimeAsia 2015. The Chapter has established good rapport with IEEE CAS Japan, Singapore, Malaysia, Indonesia and Sri Lanka over the last three years utilizing the CASS Networking initiative and has conducted workshops and conferences in collaboration with these countries. The CAS chapter is motivated to place Hyderabad section on the map of Circuits world by organizing distinguished conferences like APCCAS, ISCAS and others.